1. Field of the Invention
The present invention relates to a circuit structure, and more particularly, to a highly-integrated front-end architecture of a radio frequency (RF) transceiver and the transceiver chip thereof.
2. Description of the Related Art
FIG. 1 shows a conventional front-end architecture of an RF transceiver. As shown, the front-end architecture 100 of an RF transceiver is disposed on a printed circuit board, which includes an antenna ANT, a transmit/receive (T/R) switch 11, a first impedance matching network 12 and a second impedance matching network 13, a first balance to unbalanced transformer (balun) 14 and a second balun 15, a receiver unit 161 and a transmitter unit 163, wherein the receiver unit 161 and the transmitter unit 163 are integrated in a transceiver chip 16. The receiver unit 161 includes a low noise amplifier (LNA) 162, which receives an RF signal through the antenna ANT. The transmitter unit 163 includes a power amplifier (PA) 164, which transmits an RF signal to the antenna ANT. In receiving mode, the T/R switch 11 selectively switches a transmission signal from the antenna ANT to the input end of the first impedance matching network 12. In transmitting mode, the T/R switch 11 selectively switches a transmission signal from the output end of the second impedance matching network 13 to the antenna ANT.
To achieve the best performance, in receiving mode the antenna ANT conducts an impedance matching with the input terminal of the receiver unit 161 through the first impedance matching network 12 and the first balun 14. In transmitting mode the antenna ANT conducts an impedance matching with the output terminal of the transmitter unit 163 through the second impedance matching network 13 and the second balun 15. If the antenna ANT cannot match impedance with the receiver unit 161 or with the transmitter unit 163 in either mode, the input signals are reflected to the point of origin, causing unnecessary power consumption. The baluns 14, 15 shown in FIG. 1 each transforms either a single-ended signal into a differential signal or a differential signal into a single-ended signal. For example, the first balun 14 is used to transform a single-ended signal of the first impedance matching network 12 into a differential signal across two input terminals of the low noise amplifier 162, and the second balun 15 is used to transform a differential signal across two output terminals of the low noise amplifier 164 into a single-ended signal of the second impedance matching network 13. The low noise amplifier 162 and the power amplifier 164 employ differential signal transmission to increase their immunity to noise.
The T/R switch 11 in FIG. 1 is implemented by gallium-arsenide (GaAs) technique. The known semi-insulative property of the GaAs material can largely reduce parasitic resistance in the base, thereby reducing insertion loss of the switch components. Although GaAs materials are suitable to high-frequency circuits, they still possess some drawbacks. For example, the yield of the GaAs process is relatively low and the manufacturing cost thereof is relatively high. In addition, such kind of technology cannot implement a system-on-chip structure, thus causing additional package and test expenses. Furthermore, two additional impedance matching networks 12, 13, and two baluns 14, 15, which are disposed outside the chip, are required to achieve impedance matching in different signal transmission paths. Those additional components occupy a large space and thus increase the materials cost. Therefore, there is an important need to design a highly-integrated circuit structure to reduce the area and cost of the printed circuit board.